TY  - GEN
AU  - Lam William K C
TI  - Hardware design verification: simulation and formal method-based approaches 
SN  - 0131433474 (alk. paper)
AV  - TK7874.58 
U1  - 621.39/2 
PY  - 2005///
CY  - Upper Saddle River, NJ
PB  - Prentice Hall Professional Technical Reference
KW  - Integrated circuits
KW  - Verification
N1  - Includes bibliographical references (p. 539-559) and index
UR  - http://www.loc.gov/catdir/toc/ecip053/2004026386.html
ER  -